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rev. d a ad8001 information furnished by analog devices is believed to be accurate and reliable. however, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. no license is granted by implication or otherwise under any patent or patent rights of analog devices. trademarks and registered trademarks are the property of their respective companies. one technology way, p.o. box 9106, norwood, ma 02062-9106, u.s.a. tel: 781/329-4700 www.analog.com fax: 781/326-8703 ?2003 analog devices, inc. all rights reserved. 800 mhz, 50 mw current feedback amplifier features excellent video specifications (r l = 150 , g = +2) gain flatness 0.1 db to 100 mhz 0.01% differential gain error 0.025 differential phase error low power 5.5 ma max power supply current (55 mw) high speed and fast settling 880 mhz, ? db bandwidth (g = +1) 440 mhz, ? db bandwidth (g = +2) 1200 v/ s slew rate 10 ns settling time to 0.1% low distortion ?5 dbc thd, f c = 5 mhz 33 dbm third order intercept, f 1 = 10 mhz ?6 db sfdr, f = 5 mhz high output drive 70 ma output current dr i ves up to 4 back-terminated l oads (75 each) while maintaining good differential gain/phase performance (0.05%/0.25 ) applications a-to-d drivers video line drivers professional cameras video switchers special effects rf receivers 1 2 3 4 8 7 6 5 ad8001 nc nc ?n nc +in nc = no connect out v v+ 1 v out ad8001 ? s +in 2 34 5 +v s ?n general description the ad8001 is a low power, high speed amplifier designed to operate on 5v supplies. the ad8001 features unique gain ?db 9 6 ?2 10m 100m 1g 3 0 ? ? ? frequency ?hz v s = 5v r fb = 820 v s = 5v r fb = 1k g = +2 r l = 100 figure 1. frequency response of ad8001 transimpedance linearization circuitry. this allows it to drive video loads with excellent differential gain and phase perfor- mance on only 50 mw of power. the ad8001 is a current feedback amplifier and features gain flatness of 0.1 db to 100 mhz while offering differential gain and phase error of 0.01% and 0.025 . this makes the ad8001 ideal for professional video electronics such as cameras and video switchers. additionally, the ad8001? low distortion and fast settling make it ideal for buffer high speed a-to-d converters. the ad8001 offers low power of 5.5 ma max (v s = 5 v) and can run on a single +12 v power supply, while being capable of delivering over 70 ma of load current. these features make this amplifier ideal for portable and battery-powered app lications where size and power are critical. the outstanding bandwidth of 800 mhz along with 1200 v/ s of slew rate make the ad8001 useful in many general-purpose high speed applications where d ual power supplies of up to 6 v and single supplies from 6 v to 12 v are needed. the ad8001 is available in the industrial temperature range of ?0 c to +85 c. figure 2. transient response of ad8001; 2 v step, g = +2 8-lead pdip (n-8), cerdip (q-8) and soic (r-8) 5-lead sot-23-5 (rt-5) functional block diagrams
important links for the ad8001 * last content update 08/18/2013 12:37 am parametric selection tables find similar products by operating parameters high speed amplifiers selection table documentation ad8001: military data sheet an-692: universal precision op amp evaluation board an-649: using the analog devices active filter design tool an-358: noise and operational amplifier circuits an-356: users guide to applying and measuring operational amplifier specifications an-417: fast rail-to-rail operational amplifiers ease design constraints in low voltage high speed systems an-257: careful design tames high speed op amps an-253: find op amp noise with spreadsheet mt-057: high speed current feedback op amps mt-051: current feedback op amp noise considerations mt-034: current feedback (cfb) op amps mt-059: compensating for the effects of input capacitance on vfb and cfb op amps used in current-to-voltage converters a stress-free method for choosing high-speed op amps ug-127: universal evaluation board for high speed op amps in sot-23-5/sot-23-6 packages ug-101: evaluation board user guide adi warns against misuse of cots integrated circuits two-stage current-feedback amplifier choosing high-speed signal processing components for ultrasound systems current feedback amplifiers part 1: ask the applications engineer-22 current feedback amplifiers part 2: ask the applications engineer-23 pcn#00-406 aerospace dice standard space level products program space qualified parts list evaluation kits & symbols & footprints view the evaluation boards and kits page for documentation and purchasing symbols and footprints design tools, models, drivers & software analog filter wizard 2.0 ad8001a spice macro model ad8001an spice macro model ad8001ar spice macro model design collaboration community collaborate online with the adi support team and other designers about select adi products. follow us on twitter: www.twitter.com/adi_news like us on facebook: www.facebook.com/analogdevicesinc design support submit your support request here: linear and data converters embedded processing and dsp telephone our customer interaction centers toll free: americas: 1-800-262-5643 europe: 00800-266-822-82 china: 4006-100-006 india: 1800-419-0108 russia: 8-800-555-45-90 quality and reliability lead(pb)-free data sample & buy ad8001 view price & packaging request evaluation board request samples check inventory & purchase find local distributors * this page was dynamically generated by analog devices, inc. and inserted into this data sheet. note: dynamic changes to the content on this page (labeled 'important links') does not constitute a change to the revision number of the product data sheet. this content may be frequently modified. powered by tcpdf (www.tcpdf.org)
rev. d ? ad8001?pecifications (@ t a = + 25 c, v s = 5 v, r l = 100 , unless otherwise noted.) ad8001a model conditions min typ max unit dynamic performance ? db small signal bandwidth, n package g = +2, < 0.1 db peaking, r f = 750 ? 350 440 mhz g= +1, < 1 db peaking, r f = 1 k ? 650 880 mhz r package g = +2, < 0.1 db peaking, r f = 681 ? 350 440 mhz g= +1, < 0.1 db peaking, r f = 845 ? 575 715 mhz rt package g = +2, < 0.1 db peaking, r f = 768 ? 300 380 mhz g= +1, < 0.1 db peaking, r f = 1 k ? 575 795 mhz bandwidth for 0.1 db flatness n package g = +2, r f = 750 ? 85 110 mhz r package g = +2, r f = 681 ? 100 125 mhz rt package g = +2, r f = 768 ? 120 145 mhz slew rate g = +2, v o = 2 v step 800 1000 v/ s g = ?, v o = 2 v step 960 1200 v/ s settling time to 0.1% g = ?, v o = 2 v step 10 ns rise and fall time g = +2, v o = 2 v step, r f = 649 ? 1.4 ns noise/harmonic performance total harmonic distortion f c = 5 mhz, v o = 2 v p-p ?5 dbc g = +2, r l = 100 ? input voltage noise f = 10 khz 2.0 nv/ hz input current noise f = 10 khz, +in 2.0 pa/ hz ?n 18 pa/ hz differential gain error ntsc, g = +2, r l = 150 ? 0.01 0.025 % differential phase error ntsc, g = +2, r l = 150 ? 0.025 0.04 degree third order intercept f = 10 mhz 33 dbm 1 db gain compression f = 10 mhz 14 dbm sfdr f = 5 mhz ?6 db dc performance input offset voltage 2.0 5.5 mv t min ? max 2.0 9.0 mv offset drift 10 v/ c ?nput bias current 5.0 25 a t min ? max 35 a +input bias current 3.0 6.0 a t min ? max 10 a open-loop transresistance v o = 2.5 v 250 900 k ? t min ? max 175 k ? input characteristics input resistance +input 10 m ? ?nput 50 ? input capacitance +input 1.5 pf input common-mode voltage range 3.2 v common-mode rejection ratio offset voltage v cm = 2.5 v 50 54 db ?nput current v cm = 2.5 v, t min ? max 0.3 1.0 a/v +input current v cm = 2.5 v, t min ? max 0.2 0.7 a/v output characteristics output voltage swing r l = 150 ? 2.7 3.1 v output current r l = 37.5 ? 50 70 ma short circuit current 85 110 ma power supply operating range 3.0 6.0 v quiescent current t min ? max 5.0 5.5 ma power supply rejection ratio +v s = +4 v to +6 v, ? s = ? v 60 75 db ? s = 4 v to 6 v, +v s = +5 v 50 56 db ?nput current t min ? max 0.5 2.5 a/v +input current t min ? max 0.1 0.5 a/v specifications subject to change without notice.
rev. d ad8001 ? absolute maximum ratings 1 supply voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12.6 v internal power dissipation @ 25 c 2 pdip package (n) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.3 w soic (r) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.8 w 8-lead cerdip . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.1 w sot-23-5 package (rt) . . . . . . . . . . . . . . . . . . . . . . . 0.5 w input voltage (common mode) . . . . . . . . . . . . . . . . . . . . v s differential input voltage . . . . . . . . . . . . . . . . . . . . . . . 1.2 v output short circuit duration .. . . . . . . . . . . . . . . . . . . . .o bserve power derating curves storage temperature range n, r . . . . . . . . . ?5 c to +125 c operating temperature range (a grade) . . . 40 c to +85 c lead temperature range (soldering 10 sec) . . . . . . . . . 300 c notes 1 stresses above those listed under absolute maximum ratings may cause perma- nent damage to the device. this is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. 2 specification is for device in free air: 8-lead pdip package: ja = 90 c/w 8-lead soic package: ja = 155 c/w 8-lead cerdip package: ja = 110 c/w 5-lead sot-23-5 package: ja = 260 c/w maximum power dissipation the maximum power that can be safely dissipated by the ad8001 is limited by the associated rise in junction tempera- ture. the maximum safe junction temperature for plastic encapsulated devices is determined by the glass transition tem- perature of the plastic, approximately 150 c. exceeding this limit temporarily may cause a shift in parametric performance due to a change in the stresses exerted on the die by the package. exceeding a junction temperature of 175 c for an extended period can result in device failure. while the ad8001 is internally short circuit protected, this may not be sufficient to guarantee that the maximum junction temperature (150 c) is not exceeded under all conditions. to ensure proper operation, it is necessary to observe the maximum power derating curves. 2.0 0 ?0 80 1.5 0.5 ?0 1.0 010 ?0 ?0 ?0 20 30 40 50 60 70 90 ambient temperature ? c maximum power dissipation ?w 8-lead pdip package t j = +150 c 5-lead sot-23-5 package 8-lead soic package 8-lead cerdip package figure 3. plot of maximum power dissipation vs. temperature caution esd (electrostatic discharge) sensitive device. electrostatic charges as high as 4000 v readily accumulate on the human body and test equipment and can discharge without detection. although the ad8001 features proprietary esd protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. therefore, proper esd precautions are recommended to avoid performance degradation or loss of functionality. warning! esd sensitive device ordering guide temperature package package model range description option branding ad8001an ?0 c to +85 c 8-lead pdip n-8 ad8001aq ?5 c to +125 c 8-lead cerdip q-8 ad8001ar ?0 c to +85 c 8-lead soic r-8 ad8001ar-reel ?0 c to +85 c 13" tape and reel r-8 ad8001ar-reel7 ?0 c to +85 c 7" tape and reel r-8 ad8001art-reel ?0 c to +85 c 13" tape and reel rt-5 hea ad8001art-reel7 ?0 c to +85 c 7" tape and reel rt-5 hea ad8001achips ?0 c to +85 cd ie form 5962-9459301mpa * ?5 c to +125 c 8-lead cerdip q-8 * standard military drawing device.
rev. d ad8001 ? hp8133a pulse generator 806 +v s r l = 100 50 v in 0.1 f 0.001 f ad8001 0.1 f 0.001 f t r /t f = 50ps 806 v out to tektronix csa 404 comm. signal analyzer ? s tpc 1. test circuit , gain = +2 tpc 2. 1 v step response, g = +2 0.5v 5ns tpc 3. 2 v step response, g = +1 5ns 400mv tpc 4. 2 v step response, g = +2 lecroy 9210 pulse generator 909 +v s r l = 100 ? s 50 v in 0.1 f 0.001 f ad8001 0.1 f 0.001 f t r /t f = 350ps v out to tektronix csa 404 comm. signal analyzer tpc 5. test circuit, gain = +1 tpc 6. 100 mv step response, g = +1 ?ypical performance characteristics
rev. d ad8001 ? gain ?db 9 6 ?2 10m 100m 1g 3 0 ? ? ? frequency ?hz v s = 5v r fb = 820 v s = 5v r fb = 1k g = +2 r l = 100 tpc 7. frequency response, g = +2 output ?db 0.1 0 ?.9 1m 10m 100m ?.1 ?.2 ?.3 ?.4 ?.5 frequency ?hz ?.6 ?.7 ?.8 r f = 649 r f = 698 r f = 750 g = +2 r l = 100 v in = 50mv tpc 8. 0.1 db flatness, r package (for n package add 50 ? to r f ) ?0 ?0 ?10 100k 100m 10m 1m 10k ?0 ?00 ?0 ?0 frequency ?hz harmonic distortion ?dbc v out = 2v p-p r l = 1k g = +2 5v supplies third harmonic second harmonic tpc 9. distortion vs. frequency, r l = 1 k ? value of feedback resistor (r f ) ? ?db bandwidth ?mhz 1000 0 1000 600 200 600 400 500 800 900 800 700 r package n package v s = 5v r l = 100 g = +2 tpc 10. ? db bandwidth vs. r f ?0 ?0 ?00 100k 100m 10m 1m 10k ?0 ?0 ?0 frequency ?hz harmonic distortion ?dbc v out = 2v p-p r l = 100 g = +2 5v supplies second harmonic third harmonic tpc 11. distortion vs. frequency, r l = 100 ? 0.08 0.01 ?.01 0 0.00 0.00 0.02 0.02 0.04 0.06 100 ire diff gain ?% diff phase ?degrees ?.02 g = +2 r f = 806 1 back terminated load (150 ) 2 back terminated loads (75 ) 1 and 2 back terminated loads (150 and 75 ) tpc 12. differential gain and differential phase
rev. d ad8001 ? gain ?db 0 ? ?5 100m 1g 3g ?0 ?5 ?0 ?5 ?0 frequency ?hz 5 v in = ?6dbm r f = 909 tpc 13. frequency response, g = +1 1 ? ? 10m 1g 100m 2m ? ? ? 0 ? ? ? ? output ?db frequency ?hz g = +1 r l = 100 v in = 50mv r f = 649 r f = 953 tpc 14. flatness, r package, g = +1 (for n package add 100 ? to r f ) ?0 ?0 ?10 100k 100m 10m 1m 10k ?0 ?0 ?0 ?00 ?0 distortion ?dbc frequency ?hz g = +1 r l = 1k v out = 2v p-p second harmonic third harmonic tpc 15. distortion vs. frequency, r l = 1 k ? 1000 900 500 600 700 1100 800 900 800 700 600 1000 value of feedback resistor (r f ) ? ?db bandwidth ?mhz n package r package v in = 50mv r l = 100 g = +1 tpc 16. ? db bandwidth vs. r f , g = +1 frequency ?hz 10k 100k 1m 10m 100m ?0 ?0 ?00 ?0 ?0 ?0 ?0 distortion ?dbc r l = 100 g = +1 v out = 2v p-p second harmonic third harmonic tpc 17. distortion vs. frequency, r l = 100 ? 3 ? ?4 1m 100m 10m ?2 ?5 ? ? frequency ?hz ?7 0 ?8 ?1 output ?dbv r l = 100 g = +1 tpc 18. large signal frequency response, g = +1
rev. d ad8001 ? 25 10 ? 1m 10m 100m 0 5 15 20 frequency ?hz gain ?db ?5 ?0 ?5 ?0 1g 45 30 35 40 r f = 470 g = +100 g = +10 r l = 100 r f = 1000 tpc 19. frequency response, g = +10, g = +100 3.35 100 2.95 ?0 ?0 3.05 3.15 3.25 80 60 40 20 0 ?0 output swing ?volts junction temperature ? c 2.75 2.85 2.55 2.65 r l = 50 v s = 5v r l = 150 v s = 5v | ? out | | ? out | +v out +v out tpc 20. output swing vs. temperature ?0 junction temperature ? c input bias current ? a ? 2 ? 1 0 5 ? ?0 ?0 0 20 40 60 80 100 120 140 ? 3 4 +in ?n tpc 21. input bias current vs. temperature 2.2 0.4 100 0.8 0.6 ?0 ?0 1.0 1.2 1.4 1.6 1.8 2.0 80 60 40 20 0 ?0 input offset voltage ?mv junction temperature ? c device no. 1 device no. 2 device no. 3 tpc 22. input offset vs. temperature ?0 junction temperature ? c supply current ?ma 4.4 4.8 5.8 ?0 ?0 0 20 40 60 80 100 120 140 5.2 5.4 4.6 5.6 5.0 v s = 5v tpc 23. supply current vs. temperature 125 85 100 95 90 ?0 ?0 105 100 110 115 120 80 60 40 20 0 ?0 junction temperature ? c short circuit current ?ma source i sc | sink i sc | tpc 24. short circuit current vs. temperature
rev. d ad8001 ? ?0 junction temperature ? c transresistance ?k 0 1 6 ?0 ?0 0 20 40 60 80 100 120 140 3 4 5 2 v s = 5v r l = 150 v out = 2.5v ? z +t z tpc 25. transresistance vs. temperature 100 10 1 10 100 10k 1k frequency ?hz 100 10 1 noise voltage ?nv/ hz noise current ?pa/ hz 100k inverting current v s = 5v noninverting current v s = 5v voltage noise v s = 5v tpc 26. noise vs. frequency ?0 junction temperature ? c cmrr ?db ?8 ?0 ?0 0 20 40 60 80 100 120 140 ?1 ?0 ?9 ?3 ?5 ?4 ?2 ?6 +cmrr ?mrr 2.5v span tpc 27. cmrr vs. temperature 100k 100m 10m 1m 10k 0.01 1k 10 0.1 100 frequency ?hz r out ? 1 g = +2 r f = 909 tpc 28. output resistance vs. frequency 1 ? ? 1m 10m 1g 100m ? ? ? ? ? ? ? 0 frequency ?hz output ?db g = ? r l = 100 v in = 50mv r f = 576 r f = 649 r f = 750 tpc 29. ? db bandwidth vs. frequency, g = ? ?0 junction temperature ? c psrr ?db ?2.5 ?0 ?0 0 20 40 60 80 100 ?2.5 ?0.0 ?7.5 ?7.5 ?5.0 ?2.5 ?5.0 ?7.5 ?0.0 ?5.0 +psrr ?srr 3v span curves are for worst- case condition where one supply is varied while the other is held constant. tpc 30. psrr vs. temperature
rev. d ad8001 ? 300k 100m 10m 1m frequency ?hz ?0 ?0 ?0 ?0 cmrr ?db 910 v out v in 150 150 910 51 62 1g ?0 tpc 31. cmrr vs. frequency 1 ? ? 1m 10m 1g 100m ? ? ? ? ? ? ? 0 frequency ?hz output ?db r f = 750 r f = 649 r f = 549 g = ? r l = 100 v in = 50mv rms tpc 32. ? db bandwidth vs. frequency, g = ? tpc 33. 100 mv step response, g = ? 10 ?0 1m 10m 100m ?0 0 20 frequency ?hz psrr ?db ?0 ?0 ?0 ?0 1g 30 curves are for worst- case condition where one supply is varied while the other is held constant. r f = 909 g = +2 ?srr +psrr ?srr +psrr tpc 34. psrr vs. frequency tpc 35. 2 v step response, g = ? 3 ? ? 2 1 0 ? ? ? 5 4 100 20 0 10 80 90 70 60 50 40 30 100 20 0 10 80 90 70 60 50 40 30 count percent input offset voltage ?mv 3 wafer lots count = 895 mean = 1.37 std dev = 1.13 min = ?.45 max = +4.69 freq dist cumulative tpc 36. input offset voltage distribution
rev. d ad8001 ?0 theory of operation a very simple analysis can put the operation of the ad8001, a current feedback amplifier, in familiar terms. being a current feedback amplifier, the ad8001? open-loop behavior is expressed as transimpedance, ? v o / ? i ?n , or t z . the open-loop transim ped- ance behaves just as the open-loop voltage gain of a voltage feedback amplifier, that is, it has a large dc value and decreases at roughly 6 db/octave in frequency. since the r in is proportional to 1/ g m , the equivalent voltage gain is just t z g m , where the g m in question is the trans- conductance of the input stage. this results in a low open-loop input impedance at the inverting input, a now familiar result. using this amplifier as a follower with gain, figure 4, basic analysis yields the following result. v v g ts ts g r r g r r rg o in z zin in m = + + =+ = () () / 1 1 1 2 150 ? v out r1 r2 r in v in figure 4. follower with gain recognizing that g r in << r 1 for low gains, it can be seen to the first order that bandwidth for this amplifier is independent of gain (g). this simple analysis in conjunction with figure 5 can, in fact, predict the behavior of the ad8001 over a wide range of conditions. frequency ?hz 1m 10 100k 1m 1g 100m 10m 100 100k 10k 1k t z ? figure 5. transimpedance vs. frequency considering that additional poles contribute excess phase at high frequencies, there is a minimum feedback resistance below which peaking or oscillation may result. this fact is used to determine the optimum feedback resistance, r f . in practice, parasitic capacitance at pin 2 will also add phase in the feedback loop, so picking an optimum value for r f can be difficult. figure 6 illustrates this problem. here the fine scale (0.1 db/ div) flatness is plotted v ersus f eedback resistance. these plots were taken using an evaluation card which is available to cus- tomers so that these results may readily be duplicated. achieving and maintaining gain flatness of better than 0.1 db at frequencies above 10 mhz requires careful consideration of several issues. output ?db 0.1 0 ?.9 1m 10m 100m ?.1 ?.2 ?.3 ?.4 ?.5 frequency ?hz ?.6 ?.7 ?.8 g = +2 r f = 649 r f = 698 r f = 750 figure 6. 0.1 db flatness vs. frequency choice of feedback and gain resistors because of the above-mentioned relationship between the band- width and feedback resistor, the fine scale gain flatness will, to some extent, vary with feedback resistance. it, therefore, is recommended that once optimum resistor values have been determined, 1% tolerance values should be used if it is desired to maintain flatness over a wide range of production lots. in addi tion, resistors of different construction have different associated para sitic capacitance and inductance. surface-mount resistors were used for the bulk of the characterization for this data sheet. it is not recommended that leaded components be used with the ad8001.
rev. d ad8001 ?1 printed circuit board layout considerations as to be expected for a wideband amplifier, pc board parasitics can affect the overall closed-loop performance. of concern are stray capacitances at the output and the inverting input nodes. if a ground plane is to be used on the same side of the board as the signal traces, a space (5 mm min) should be left around the signal lines to minimize coupling. additionally, signal lines connecting the feedback and gain resistors should be short enough so that their associ ated inductance does not cause high frequency gain errors. line lengths on the order of less than 5 mm are recommended. if long runs of coaxial cable are being driven, dispersion and loss must be considered. power supply bypassing adequate power supply bypassing can be critical when optimiz- ing the performance of a high frequency circuit. inductance in the power supply leads can form resonant circuits that produce peaking in the amplifier? response. in addition, if large current transients must be delivered to the load, then bypass capacitors (typically greater than 1 f) will be required to provide the best settling time and lowest distortion. a parallel combination of 4.7 f and 0.1 f is recommended. some brands of electrolytic capacitors will require a small series damping resistor 4.7 ? for optimum results. dc errors and noise there are three major noise and offset terms to consider in a current feedback amplifier. for offset errors, refer to the equation below. for noise error the terms are root-sum-squared to give a net output error. in the circuit in figure 7 they are input offset (v io ), which appears at the output multiplied by the noise gain of the circuit (1 + r f /r i ), noninverting input current (i bn r n ) also multiplied by the noise gain, and the inverting input cur rent, which when divided between r f and r i and subsequently mu lti plied by the noise gain always appears at the output as i bn r f . the input voltage noise of the ad8001 is a low 2 nv/ hz . at low gains though the inverting input current noise times r f is the dominant noise source. careful layout and device matching contribute to better offset and drift specifications for the ad8001 compared to many other current feedback ampli- fiers. the typical performance curves in conjunction with the following equations can be used to predict the performance of the ad8001 in an y application. vv r r ir r r ir out io f i bn n f i bi f =+ ? ? ? ? ? ? + ? ? ? ? ? ? 11 r f r i r n i bn v out i bi figure 7. output offset voltage driving capacitive loads the ad8001 was designed primarily to drive nonreactive loads. if driving loads with a capacitive component is desired, best frequency response is obtained by the addition of a small series resistance, as shown in figure 8. the accompanying graph shows the optimum value for r series versus capacitive load. it is worth noting that the frequency response of the circuit when driving large capacitive loads will be dominated by the passive roll-off of r series and c l . 909 r series r l 500 i n c l figure 8. driving capacitive loads 40 0 0 25 30 10 5 20 15 20 10 c l ?pf g = +1 r series figure 9. recommended r series vs. capacitive load
rev. d ad8001 ?2 communications distortion is a key specification in communications applications. intermodulation distortion (imd) is a measure of the ability of an amplifier to pass complex signals without the generation of spurious harmonics. the third order products are usually the most problematic since several of them fall near the fundamen tals and do not lend themselves to filtering. theory predicts that the third order harmonic distortion components increase in power at three times the rate of the fundamental tones. the specification of third order intercept as the virtual point where fundamental and harmonic power are equal is one standard measure of distortion performance. op amps used in closed-loop applications do not always obey this simple theory. at a gain of +2, the ad8001 has performance summarized in figure 10. here the worst third order products are plotted versus input power. the third order intercept of the ad8001 is +33 dbm at 10 mhz. ?0 3 ? ?5 2 1 0 ? ? 6 ? ?0 ?5 ?0 ?5 ?0 ?5 ? third order imd ?dbc input power ?dbm ? ? 4 5 ? 2f 2 ?f 1 2f 1 ?f 2 g = +2 f 1 = 10mhz f 2 = 12mhz figure 10. third order imd; f 1 = 10 mhz, f 2 = 12 mhz operation as a video line driver the ad8001 has been designed to offer outstanding perfor- mance as a video line driver. the important specifications of differential gain (0.01%) and differential phase (0.025 ) meet the most exacting hdtv demands for driving one video load. the ad8001 also drives up to two back terminated loads as s hown in figure 11, with equally impressive performance (0.01%, 0.07 ). another important consideration is isolation between loads in a multiple load application. the ad8001 has more than 40 db of isolation at 5 mhz when driving two 75 ? back terminated loads. 909 909 75 cable 75 75 v out no. 1 v out no. 2 +v s ? s v in 0.1 f 0.001 f ad8001 0.1 f 75 cable 75 75 75 cable + 0.001 f 75 figure 11. video line driver
rev. d ad8001 ?3 0.1 f +v s ? s 20 50 1k 18 17 16 15 14 13 12 11 ? ref a 10pf clock 5, 9, 22, 24, 37, 41 4,19, 21 25, 27, 42 0.1 f 38 8 ? ref b 6 +v int 2 3 +v ref a a in a 649 324 analog in a 0.5v 1.3k ad707 43 +v ref b 20k 0.1 f ?v 1.3k 20k 649 analog in b 0.5v 324 20 0.1 f 40 comp 1 a in b encode a encode b 10 36 encode 74act04 0.1 f +5v 28 29 30 31 32 33 34 35 rz1 rz2 d 0a (lsb) d 7a (msb) d 0b (lsb) d 7b (msb) 7, 20, 26, 39 ?v 1n4001 ad9058 (j-lead) rz1, rz2 = 2,000 sip (8-pkg) 74act 273 74act 273 8 8 ad8001 ad8001 figure 12. ad8001 driving a dual a-to-d converter driving a-to-d converters the ad8001 is well suited for driving high speed analog-to- digital converters such as the ad9058. the ad9058 is a dual 8-bit 50 msps adc. in the circuit below, the ad8001 is shown driving the inputs of the ad9058, which are configured for 0 v to 2 v ranges. bipolar input signals are buffered, amplified (? ), and offset (by +1.0 v) into the proper input range of the adc. using the ad9058? internal +2 v reference connected to both adcs as shown in figure 12 reduces the number of external components required to create a complete data acquisition system. the 20 ? resistors in series with adc inputs are used to help the ad8001s drive the 10 pf adc input capacitance. the ad8001 only adds 100 mw to the power consumption while not limiting the performance of the circuit.
rev. d ad8001 ?4 layout considerations the specified high speed performance of the ad8001 requires careful attention to board layout and component selection. proper r f design techniques and low parasitic component selection are mandatory. the pcb should have a ground plane covering all unused portions of the component side of the board to provide a low impedance ground path. the ground plane should be removed from the area near the input pins to reduce stray capacitance. chip capacitors should be used for supply bypassing (see figure 13). one end should be connected to the ground plane and the other within 1/8 inch of each power pin. an additional large (4.7 f?0 f) tantalum electrolytic capacitor should be con- nected in parallel, but not necessarily so close, to supply current for fast, large-signal changes at the output. the feedback resistor should be located close to the inverting input pin in order to keep the stray capacitance at this node to a minimum. capacitance variations of less than 1 pf at the invert- ing input will significantly affect high speed performance. stripline design techniques should be used for long signal traces (greater than about 1 inch). these should be designed with a characteristic impedance of 50 ? or 75 ? and be properly termi- nated at each end. inverting configuration supply bypassing c1 0.1 f c2 0.1 f +v s ? s c3 10 f c4 10 f noninverting configuration r f r o in +v s ? s r s r t r g out r f r o in +v s ? s r t r g out figure 13. inverting and noninverting configurations for evaluation boards table i. recommended component values ad8001an (pdip) ad8001ar (soic) ad8001art (sot-23-5) gain gain gain component ? +1 +2 +10 +100 ? +1 +2 +10 +100 ? +1 +2 +10 +100 r f ( ? ) 649 1050 750 470 1000 604 953 681 470 1000 845 1000 768 470 1000 r g ( ? ) 649 750 51 10 604 681 51 10 845 768 51 10 r o (nominal) ( ? ) 49.9 49.9 49.9 49.9 49.9 49.9 49.9 49.9 49.9 49.9 49.9 49.9 49.9 49.9 49.9 r s ( ? )0 0 0 r t (nominal) ( ? ) 54.9 49.9 49.9 49.9 49.9 54.9 49.9 49.9 49.9 49.9 54.9 49.9 49.9 49.9 49.9 small signal 340 880 460 260 20 370 710 440 260 20 240 795 380 260 20 bw (mhz) 0.1 db flatness 105 70 105 130 100 120 110 300 145 (mhz)
rev. d ad8001 ?5 8-lead plastic dual in-line package [pdip] (n-8) dimensions shown in inches and (millimeters) seating plane 0.180 (4.57) max 0.150 (3.81) 0.130 (3.30) 0.110 (2.79) 0.060 (1.52) 0.050 (1.27) 0.045 (1.14) 8 1 4 5 0.295 (7.49) 0.285 (7.24) 0.275 (6.98) 0.100 (2.54) bsc 0.375 (9.53) 0.365 (9.27) 0.355 (9.02) 0.150 (3.81) 0.135 (3.43) 0.120 (3.05) 0.015 (0.38) 0.010 (0.25) 0.008 (0.20) 0.325 (8.26) 0.310 (7.87) 0.300 (7.62) 0.022 (0.56) 0.018 (0.46) 0.014 (0.36) controlling dimensions are in inches; millimeter dimensions (in parentheses) are rounded-off inch equivalents for reference only and are not appropriate for use in design compliant to jedec standards mo-095aa 0.015 (0.38) min 8-lead standard small outline package [soic] (r-8) dimensions shown in millimeters and (inches) 0.25 (0.0098) 0.17 (0.0067) 1.27 (0.0500) 0.40 (0.0157) 0.50 (0.0196) 0.25 (0.0099) 45 8 0 1.75 (0.0688) 1.35 (0.0532) seating plane 0.25 (0.0098) 0.10 (0.0040) 85 4 1 5.00 (0.1968) 4.80 (0.1890) 4.00 (0.1574) 3.80 (0.1497) 1.27 (0.0500) bsc 6.20 (0.2440) 5.80 (0.2284) 0.51 (0.0201) 0.31 (0.0122) coplanarity 0.10 controlling dimensions are in millimeters; inch dimensions (in parentheses) are rounded-off millimeter equivalents for reference only and are not appropriate for use in design compliant to jedec standards ms-012aa outline dimensions 8-lead ceramic dual in-line package [cerdip] (q-8) dimensions shown in inches and (millimeters) 1 4 85 0.310 (7.87) 0.220 (5.59) pin 1 0.005 (0.13) min 0.055 (1.40) max 0.100 (2.54) bsc 15 0 0.320 (8.13) 0.290 (7.37) 0.015 (0.38) 0.008 (0.20) seating plane 0.200 (5.08) max 0.405 (10.29) max 0.150 (3.81) min 0.200 (5.08) 0.125 (3.18) 0.023 (0.58) 0.014 (0.36) 0.070 (1.78) 0.030 (0.76) 0.060 (1.52) 0.015 (0.38) controlling dimensions are in inches; millimeters dimensions (in parentheses) are rounded-off inch equivalents for reference only and are not appropriate for use in design 5-lead small outline transistor package [sot-23] (rt-5) dimensions shown in millimeters pin 1 1.60 bsc 2.80 bsc 1.90 bsc 0.95 bsc 1 3 4 5 2 0.22 0.08 10 5 0 0.50 0.30 0.15 max seating plane 1.45 max 1.30 1.15 0.90 2.90 bsc 0.60 0.45 0.30 compliant to jedec standards mo-178aa
rev. d ad8001 ?6 c01043??/03(d) revision history location page 7/03?ata sheet changed from rev. c to rev. d renumbered figures and tpcs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . universal changes to ordering guide . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 updated outline dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
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